Electrocardiogram (ECG) is a science that converts the ionic depolarization into a measurable electrical signal for analysis. One of the most common challenges in analog electronic interface to electrode/patient design is the optimization of right leg drive (RLD) for high common mode performance and stability. This design process can be greatly simplified with SPICE analysis.

In the ECG front end, the RLD amplifier has a common-mode electrode bias of Vref and feeds back the inverted common-mode noise signal (enoise_cm) to reduce the total noise at the input of the gain stage of the measurement amplifier. In Figure 1, the source ECGp and ECGn are separated to show how the RLD amplifier provides a common-mode reference point for a portion of the ECG signal that can be seen at the positive and negative inputs of the measurement amplifier (INA). The parallel RC combination of the left, right, and right legs represents the lumped passive electrode connection impedance (represented by 52k? and 47nf later in this article). Assuming that enoise is parasitically coupled to the input, the feedback of enoise_cm reduces the total noise signal at each input and filters the residual noise using an external method, or suppresses it by using the common-mode rejection ratio (CMRR) of the measurement amplifier.

Figure 1 LEAD I and RLD Easy Connection

In Figures 2, 3, and 4, we can see the common mode rejection variation, indicating that the common mode test circuit has different RLD amplifier gains. These figures show that the best low-frequency CMRR is achieved without a feedback resistor (ie, the gain is infinite); however, in the real world, for applications that require the RLD amplifier to run linearly after an input amplifier lead is removed It may not be practical to remove the DC path and/or set the RF to a high value.

Figure 2 Relationship between CMRR and RLD gain

Figure 3 CMRR diagram vs. frequency and RLD gain (RF)

Figure 4 Relationship between MCRR RLD and no RLD

Figure 5 small signal pulse test circuit

Figure 6 Figure 5 output curve

Once the gain of the RLD amplifier is determined, the test circuit shown in Figure 5 can be used and a small signal step is injected into the loop and the output response is monitored. At this point, the response (shown in Figure 6) shows a strong output oscillation indicating instability in the loop. The main feedback path that causes this instability is the body/electrode/measurement amplifier feedback path around the RLD amplifier. The test circuit shown in Figure 7 allows the feedback and open-loop gain (AOL) plots of the RLD amplifier to be analyzed separately on a Bode plot.

Figure 7 Electrode / Measurement Amplifier Feedback Test Circuit

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